Capping descriptor build times notice log
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Recently we introduced a maximum circuit build time of twice what we ever observed, but when we do cap we emit a notice log, which can be quite spammy. We should not have all these cbt notice logs, I think - they don't really tell the user anything, they aren't necessarily an indication of a problem, etc.
Also, there seems to be a bug:
Oct 04 19:38:05.311 [notice] Circuit build measurement period of 118361ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:38:05.311 [notice] Based on 162 circuit times, it looks like we don't need to wait so long for circuits to finish. We will now assume a circuit is too slow to use after waiting 10 seconds.
Oct 04 19:38:10.075 [notice] Circuit build measurement period of 117281ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:38:12.271 [notice] Circuit build measurement period of 117330ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:38:16.805 [notice] Circuit build measurement period of 120054ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:38:21.109 [notice] Circuit build measurement period of 117447ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:38:38.345 [notice] Circuit build measurement period of 122752ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:41:05.013 [notice] Circuit build measurement period of 135039ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:42:06.013 [notice] Circuit build measurement period of 148555ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:42:06.013 [notice] Based on 169 circuit times, it looks like we need to wait longer for circuits to finish. We will now assume a circuit is too slow to use after waiting 11 seconds.
Oct 04 19:44:08.013 [notice] Circuit build measurement period of 163425ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:45:09.013 [notice] Circuit build measurement period of 179783ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:45:09.013 [notice] Based on 171 circuit times, it looks like we need to wait longer for circuits to finish. We will now assume a circuit is too slow to use after waiting 12 seconds.
Oct 04 19:46:10.013 [notice] Circuit build measurement period of 197779ms is more than twice the maximum build time we have ever observed. Capping it to 116950ms.
Oct 04 19:46:10.013 [notice] Based on 172 circuit times, it looks like we need to wait longer for circuits to finish. We will now assume a circuit is too slow to use after waiting 13 seconds.We never increase the value we're capping to, instead of doubling it.